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Browsing by  Author여동희

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Showing results 22 to 28 of 28
Conference
TX Digital Circuit for USB 2.0 PHY High Speed Interface

2010 International Conference on Electronics, Information, and Communication, 2010-07-01

Conference
Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits

ITC-CSCC, 2011-06-22

Conference
Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits

International Technical Conference on Circuits/Systems, Computers and Communications, 2011-06-22

Conference
Verilog Synthesis of USB 2.0 Full-speed Device PHY IP

IEIE & IEEE, Int. SoC Design Conference(ISOCC), 2013-11-18

Conference
Verilog Synthesis of USB 2.0 Full-speed Device PHY IP

International SoC Design Conference, 2013-11-19

Conference
Verilog Synthesis of USB 2.0 Full-speed Device PHY IP

International SoC Design Conference, 2013-11-19

Thesis
Verilog로 설계 및 합성한 USB 2.0 High Speed용 송수신기의 디지털 회로

Thesis(Master), 2010

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