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Article

Balancing Computation Loads and Optimizing Input Vector Loading in LSTM AcceleratorsSCIESCOPUS

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 39, no. 9, page. 1889 - 1901, 2019-09

Conference

Time-step interleaved weight reuse for LSTM neural network computing

2020 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2020, 2020-08-11

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