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Cited 32 time in webofscience Cited 33 time in scopus
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dc.contributor.authorYeo, I.-
dc.contributor.authorChu, M.-
dc.contributor.authorGi, S.-G.-
dc.contributor.authorHwang, H.-
dc.contributor.authorLee, B.-G.-
dc.date.accessioned2019-12-03T12:10:32Z-
dc.date.available2019-12-03T12:10:32Z-
dc.date.created2019-07-11-
dc.date.issued2019-07-
dc.identifier.issn0018-9383-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/100193-
dc.description.abstractIn this study, a circuit technique and training algorithm that minimizes the effect of stuck-at-faults (SAFs) within a memristor crossbar array of neural networks (NNs) are presented. To improve the network performance in the presence of SAFs, a conventional transimpedance amplifier, which is used for summing the currents that flow through the memristors, is modified to ensure that the amplifier output is within the appropriate operating range. Further improvement in the network performance is achieved by using the proposed training algorithm, which utilizes the locations and values of faulty memristors for network training. A feedforward NN employing 32 x 32 memristor crossbar arrays is implemented to verify the performance improvement in the NNs using the proposed circuit technique and training algorithm.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.relation.isPartOfIEEE TRANSACTIONS ON ELECTRON DEVICES-
dc.titleStuck-at-Fault Tolerant Schemes for Memristor Crossbar Array-Based Neural Networks-
dc.typeArticle-
dc.identifier.doi10.1109/TED.2019.2914460-
dc.type.rimsART-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON ELECTRON DEVICES, v.66, no.7, pp.2937 - 2945-
dc.identifier.wosid000472184900012-
dc.citation.endPage2945-
dc.citation.number7-
dc.citation.startPage2937-
dc.citation.titleIEEE TRANSACTIONS ON ELECTRON DEVICES-
dc.citation.volume66-
dc.contributor.affiliatedAuthorHwang, H.-
dc.identifier.scopusid2-s2.0-85067605934-
dc.description.journalClass1-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.type.docTypeArticle-
dc.subject.keywordPlusNetwork performance-
dc.subject.keywordPlusOperational amplifiers-
dc.subject.keywordPlusCrossbar arrays-
dc.subject.keywordPlusMemristor-
dc.subject.keywordPlusMNIST-
dc.subject.keywordPlusNeural networks (NNS)-
dc.subject.keywordPlusStuck-at faults-
dc.subject.keywordPlusMemristors-
dc.subject.keywordAuthorCrossbar array-
dc.subject.keywordAuthormemristor-
dc.subject.keywordAuthorMNIST-
dc.subject.keywordAuthorneural networks (NNs)-
dc.subject.keywordAuthorstuck-at-faults (SAFs)-
dc.subject.keywordAuthortransimpedance amplifier (TIA)-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-

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황현상HWANG, HYUNSANG
Dept of Materials Science & Enginrg
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