Performance analysis of a symbol timing recovery system for VDSL transmission

Abstract

In this paper, we describe statistical properties of timing jitter of symbol timing recovery circuit for carrierless amplitude/phase modulation (CAP)-based very high-rate digital subscriber line (VDSL) system. Analytical expressions of the timing jitter for envelope-based timing recovery system, such as squarer-based timing recovery (S-TR) and absolute-value-based timing recovery (A-TR) schemes, are derived in the presence of additive white gaussian noise (AWGN) or far-end crosstalk (FEXT). In particular, the analytical and simulation results of the tinting jitter performance are presented and compared for a 51.84 Mb/s 16-CAP VDSL system. The A-TR system implemented digitally meets the DAVIC's VDSL system requirement, which specifies the maximum peak-to-peak jitter value of 1.5 nsec and the acquisition time of 20 msec.