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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, WK | - |
| dc.contributor.author | Sohn, YS | - |
| dc.contributor.author | Park, JS | - |
| dc.contributor.author | Park, HJ | - |
| dc.contributor.author | Cho, SI | - |
| dc.date.accessioned | 2015-06-25T01:59:59Z | - |
| dc.date.available | 2015-06-25T01:59:59Z | - |
| dc.date.created | 2009-02-28 | - |
| dc.date.issued | 2001-09 | - |
| dc.identifier.issn | 0916-8524 | - |
| dc.identifier.other | 2015-OAK-0000002275 | en_US |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/10277 | - |
| dc.description.abstract | An analytic equation was derived for the time jitter of digital NRZ signals due to inter-symbol interference in the PCB transmission lines loaded by DRAM chips which are located in uniform spacing. The inter-symbol interference is caused by a low-pass filtering effect of the loaded transmission line. Good agreements were observed between the equation and measurements with an average error of 17.5%. | - |
| dc.description.statementofresponsibility | open | en_US |
| dc.language | English | - |
| dc.publisher | IEICE-INST ELECTRONICS INFORMATION CO | - |
| dc.relation.isPartOf | IEICE TRANSACTIONS ON ELECTRONICS | - |
| dc.rights | BY_NC_ND | en_US |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/2.0/kr | en_US |
| dc.title | An analytic time jitter equation of NRZ signals in uniformly loaded PCB transmission lines | - |
| dc.type | Article | - |
| dc.contributor.college | 전자전기공학과 | en_US |
| dc.author.google | Park, WK | en_US |
| dc.author.google | Sohn, YS | en_US |
| dc.author.google | Cho, SI | en_US |
| dc.author.google | Park, HJ | en_US |
| dc.author.google | Park, JS | en_US |
| dc.relation.volume | E84C | en_US |
| dc.relation.issue | 9 | en_US |
| dc.relation.startpage | 1264 | en_US |
| dc.relation.lastpage | 1266 | en_US |
| dc.contributor.id | 10071836 | en_US |
| dc.relation.journal | IEICE TRANSACTIONS ON ELECTRONICS | en_US |
| dc.relation.index | SCI급, SCOPUS 등재논문 | en_US |
| dc.relation.sci | SCIE | en_US |
| dc.collections.name | Journal Papers | en_US |
| dc.type.rims | ART | - |
| dc.identifier.bibliographicCitation | IEICE TRANSACTIONS ON ELECTRONICS, v.E84C, no.9, pp.1264 - 1266 | - |
| dc.identifier.wosid | 000171700600024 | - |
| dc.date.tcdate | 2018-03-23 | - |
| dc.citation.endPage | 1266 | - |
| dc.citation.number | 9 | - |
| dc.citation.startPage | 1264 | - |
| dc.citation.title | IEICE TRANSACTIONS ON ELECTRONICS | - |
| dc.citation.volume | E84C | - |
| dc.contributor.affiliatedAuthor | Park, HJ | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
| dc.type.docType | Letter | - |
| dc.subject.keywordAuthor | time jitter | - |
| dc.subject.keywordAuthor | loaded transmission line | - |
| dc.subject.keywordAuthor | digital signal | - |
| dc.subject.keywordAuthor | inter-symbol interference | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
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- 박홍준PARK, HONG JUNE
- Dept of Electrical Enginrg