Effects of source and load impedance on the intermodulation distortion products of GaAsFETs

Abstract

The linearity of the GaAs Field Effect Transistor (FET) power amplifier is greatly influenced by the nonlinear characteristics of gate-source capacitance (C-gs) and drain-source current (I-ds) for the FETs. However. previously suggested analysis methods of GaAs FET non-linearity are mainly focused on the investigations by each individual non-linear component (C-gs) or (I-ds) without considering both non-linear effects. We analyze more accurately the non-linearity of GaAs FETs by considering non-linear effects of C-gs and I-ds simultaneously. We also investigate the third-order intermodulation distortion (IMD3) of the GaAs FET in relation to source and load impedances that minimize FET non-linearities. From the simulation results by Volterra-series technique, we show that the least IMD3 is found at the minimum source resistance (R-S) and maximum load resistance (R-L) in the equivalent output power (P-out) contour. Simulated results are compared with the load and source pull data, with good agreement.