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dc.contributor.authorKim, YH-
dc.contributor.authorJoo, JD-
dc.contributor.authorWee, JK-
dc.contributor.authorChung, JY-
dc.contributor.authorSohn, YS-
dc.contributor.authorPark, HJ-
dc.date.accessioned2015-06-25T02:00:08Z-
dc.date.available2015-06-25T02:00:08Z-
dc.date.created2009-02-28-
dc.date.issued2002-01-
dc.identifier.issn0916-8524-
dc.identifier.other2015-OAK-0000002406en_US
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/10280-
dc.description.abstractA fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of ail output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage (V-OL) to be equal to the reference voltage (V-OL.ref) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1 Gb/s. The worst-case variations of V-OL.ref and V-OL of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of 20 degreesC to 90 degreesC and a supply voltage range of 2.25 V to 2.75 V, while the worst-case variation of V-OL of the conventional output driver was measured to be 24% within the same ranges of temperature and supply voltage.-
dc.description.statementofresponsibilityopenen_US
dc.languageEnglish-
dc.publisherIEICE-INST ELECTRONICS INFORMATION CO-
dc.relation.isPartOfIEICE TRANSACTIONS ON ELECTRONICS-
dc.rightsBY_NC_NDen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/2.0/kren_US
dc.titleA temperature- and supply-insensitive fully on-chip 1 Gb/s CMOS open-drain output driver for high-bandwidth DRAMs-
dc.typeArticle-
dc.contributor.college전자전기공학과en_US
dc.author.googleKim, YHen_US
dc.author.googleJoo, JDen_US
dc.author.googlePark, HJen_US
dc.author.googleSohn, YSen_US
dc.author.googleChung, JYen_US
dc.author.googleWee, JKen_US
dc.relation.volumeE85Cen_US
dc.relation.issue1en_US
dc.relation.startpage204en_US
dc.relation.lastpage211en_US
dc.contributor.id10071836en_US
dc.relation.journalIEICE TRANSACTIONS ON ELECTRONICSen_US
dc.relation.indexSCI급, SCOPUS 등재논문en_US
dc.relation.sciSCIEen_US
dc.collections.nameJournal Papersen_US
dc.type.rimsART-
dc.identifier.bibliographicCitationIEICE TRANSACTIONS ON ELECTRONICS, v.E85C, no.1, pp.204 - 211-
dc.identifier.wosid000172986700030-
dc.date.tcdate2018-03-23-
dc.citation.endPage211-
dc.citation.number1-
dc.citation.startPage204-
dc.citation.titleIEICE TRANSACTIONS ON ELECTRONICS-
dc.citation.volumeE85C-
dc.contributor.affiliatedAuthorPark, HJ-
dc.description.journalClass1-
dc.description.journalClass1-
dc.type.docTypeArticle-
dc.subject.keywordAuthorsupply-insensitive-
dc.subject.keywordAuthorvoltage-insensitive-
dc.subject.keywordAuthoropen-drain-
dc.subject.keywordAuthoroutput driver-
dc.subject.keywordAuthorhigh-bandwidth DRAMs-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-

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박홍준PARK, HONG JUNE
Dept of Electrical Enginrg
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