DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, YH | - |
dc.contributor.author | Joo, JD | - |
dc.contributor.author | Wee, JK | - |
dc.contributor.author | Chung, JY | - |
dc.contributor.author | Sohn, YS | - |
dc.contributor.author | Park, HJ | - |
dc.date.accessioned | 2015-06-25T02:00:08Z | - |
dc.date.available | 2015-06-25T02:00:08Z | - |
dc.date.created | 2009-02-28 | - |
dc.date.issued | 2002-01 | - |
dc.identifier.issn | 0916-8524 | - |
dc.identifier.other | 2015-OAK-0000002406 | en_US |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/10280 | - |
dc.description.abstract | A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of ail output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage (V-OL) to be equal to the reference voltage (V-OL.ref) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1 Gb/s. The worst-case variations of V-OL.ref and V-OL of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of 20 degreesC to 90 degreesC and a supply voltage range of 2.25 V to 2.75 V, while the worst-case variation of V-OL of the conventional output driver was measured to be 24% within the same ranges of temperature and supply voltage. | - |
dc.description.statementofresponsibility | open | en_US |
dc.language | English | - |
dc.publisher | IEICE-INST ELECTRONICS INFORMATION CO | - |
dc.relation.isPartOf | IEICE TRANSACTIONS ON ELECTRONICS | - |
dc.rights | BY_NC_ND | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/2.0/kr | en_US |
dc.title | A temperature- and supply-insensitive fully on-chip 1 Gb/s CMOS open-drain output driver for high-bandwidth DRAMs | - |
dc.type | Article | - |
dc.contributor.college | 전자전기공학과 | en_US |
dc.author.google | Kim, YH | en_US |
dc.author.google | Joo, JD | en_US |
dc.author.google | Park, HJ | en_US |
dc.author.google | Sohn, YS | en_US |
dc.author.google | Chung, JY | en_US |
dc.author.google | Wee, JK | en_US |
dc.relation.volume | E85C | en_US |
dc.relation.issue | 1 | en_US |
dc.relation.startpage | 204 | en_US |
dc.relation.lastpage | 211 | en_US |
dc.contributor.id | 10071836 | en_US |
dc.relation.journal | IEICE TRANSACTIONS ON ELECTRONICS | en_US |
dc.relation.index | SCI급, SCOPUS 등재논문 | en_US |
dc.relation.sci | SCIE | en_US |
dc.collections.name | Journal Papers | en_US |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEICE TRANSACTIONS ON ELECTRONICS, v.E85C, no.1, pp.204 - 211 | - |
dc.identifier.wosid | 000172986700030 | - |
dc.date.tcdate | 2018-03-23 | - |
dc.citation.endPage | 211 | - |
dc.citation.number | 1 | - |
dc.citation.startPage | 204 | - |
dc.citation.title | IEICE TRANSACTIONS ON ELECTRONICS | - |
dc.citation.volume | E85C | - |
dc.contributor.affiliatedAuthor | Park, HJ | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | supply-insensitive | - |
dc.subject.keywordAuthor | voltage-insensitive | - |
dc.subject.keywordAuthor | open-drain | - |
dc.subject.keywordAuthor | output driver | - |
dc.subject.keywordAuthor | high-bandwidth DRAMs | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
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