DC-balanced block inversion coding for high-speed links
SCIE
SCOPUS
- Title
- DC-balanced block inversion coding for high-speed links
- Authors
- Sim, JY
- Date Issued
- 2006-12
- Publisher
- IEICE-INST ELECTRONICS INFORMATION CO
- Abstract
- A new 4B5B block inversion coding is proposed for dc-balanced transmission in high-speed optical parallel links. An 8-bit byte is partitioned into two 4-bit data and converted to two 5-bit blocks by an inversion encoding. The proposed coding greatly reduces circuit complexity with the minimum latency overhead of one clock for the encoder and none for the decoder. The maximum run length is 11.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/10288
- DOI
- 10.1093/ietele/e89-c.12.1948
- ISSN
- 0916-8524
- Article Type
- Article
- Citation
- IEICE TRANSACTIONS ON ELECTRONICS, vol. E89C, no. 12, page. 1948 - 1949, 2006-12
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- There are no files associated with this item.
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