DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jang, YC | - |
dc.contributor.author | Bae, JH | - |
dc.contributor.author | Park, SH | - |
dc.contributor.author | Sim, JY | - |
dc.contributor.author | Park, HJ | - |
dc.date.accessioned | 2015-06-25T02:00:46Z | - |
dc.date.available | 2015-06-25T02:00:46Z | - |
dc.date.created | 2009-02-28 | - |
dc.date.issued | 2007-06 | - |
dc.identifier.issn | 0916-8524 | - |
dc.identifier.other | 2015-OAK-0000006989 | en_US |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/10293 | - |
dc.description.abstract | An 8.8-GS/s 6-bit CMOS analog-to-digital converter (ADC) chip was implemented by time-interleaving eight 1.1-GS/s 6-bit flash ADCs with a 0.18-mu m CMOS process. Eight uniformly-spaced 1.1 GHz clocks with 50% duty cycle for the eight flash ADCs were generated by a clock generator, which consists of a phase-locked-loop, digital phase adjusters and digital duty cycle correctors. The input bandwidth of ADC with the ENOB larger than 5.0 bits was measured to be 1.2 GHz. The chip area and power consumption were 2.24 mm(2) and 1.6 W, respectively. | - |
dc.description.statementofresponsibility | open | en_US |
dc.language | English | - |
dc.publisher | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG | - |
dc.relation.isPartOf | IEICE TRANSACTIONS ON ELECTRONICS | - |
dc.rights | BY_NC_ND | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/2.0/kr | en_US |
dc.title | An 8.8-GS/s 6-bit CMOS time-interleaved flash analog-to-digital converter with multi-phase clock generator | - |
dc.type | Article | - |
dc.contributor.college | 전자전기공학과 | en_US |
dc.identifier.doi | 10.1093/IETELE/E90-C.6.1156 | - |
dc.author.google | Jang, YC | en_US |
dc.author.google | Bae, JH | en_US |
dc.author.google | Park, HJ | en_US |
dc.author.google | Sim, JY | en_US |
dc.author.google | Park, SH | en_US |
dc.relation.volume | E90C | en_US |
dc.relation.issue | 6 | en_US |
dc.relation.startpage | 1156 | en_US |
dc.relation.lastpage | 1164 | en_US |
dc.contributor.id | 10071836 | en_US |
dc.relation.journal | IEICE TRANSACTIONS ON ELECTRONICS | en_US |
dc.relation.index | SCI급, SCOPUS 등재논문 | en_US |
dc.relation.sci | SCIE | en_US |
dc.collections.name | Journal Papers | en_US |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEICE TRANSACTIONS ON ELECTRONICS, v.E90C, no.6, pp.1156 - 1164 | - |
dc.identifier.wosid | 000247891800004 | - |
dc.date.tcdate | 2019-01-01 | - |
dc.citation.endPage | 1164 | - |
dc.citation.number | 6 | - |
dc.citation.startPage | 1156 | - |
dc.citation.title | IEICE TRANSACTIONS ON ELECTRONICS | - |
dc.citation.volume | E90C | - |
dc.contributor.affiliatedAuthor | Park, HJ | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 3 | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | flash ADC | - |
dc.subject.keywordAuthor | time-interleaving | - |
dc.subject.keywordAuthor | phase-locked-loop | - |
dc.subject.keywordAuthor | digital phase adjuster | - |
dc.subject.keywordAuthor | digital duty cycle corrector | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
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