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Accelerating Relaxation Using Dynamic Error Prediction SCIE SCOPUS

Title
Accelerating Relaxation Using Dynamic Error Prediction
Authors
Hong Bo CHEJin Wook KIMTae Il BAEKim, YH
Date Issued
2009-02
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Abstract
A new acceleration scheme that decreases the number of required iterations in relaxation methodology is proposed. The proposed scheme uses dynamic error prediction of an improved approximation to the solution during an iterative computation. The proposed scheme's application to circuit simulations required an average of 67.3% fewer iterations compared to un-accelerated relaxation methods.
URI
https://oasis.postech.ac.kr/handle/2014.oak/10345
DOI
10.1587/TRANSFUN.E92.A.648
ISSN
0916-8508
Article Type
Article
Citation
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, vol. E92A, no. 2, page. 648 - 651, 2009-02
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김영환KIM, YOUNG HWAN
Dept of Electrical Enginrg
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