Full metadata record
DC Field | Value | Language |
dc.contributor.author | LEE, JEONG SOO | - |
dc.contributor.author | YOON, GILSANG | - |
dc.contributor.author | GO, DONGHYUN | - |
dc.contributor.author | JIN, JAESEOK | - |
dc.contributor.author | PARK, JOUNG HUN | - |
dc.date.accessioned | 2021-06-01T04:19:59Z | - |
dc.date.available | 2021-06-01T04:19:59Z | - |
dc.date.created | 2021-03-11 | - |
dc.date.issued | 2021-01 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/105453 | - |
dc.language | Korean | - |
dc.publisher | 한국반도체학술대회 | - |
dc.relation.isPartOf | 제28회 한국반도체학술대회 | - |
dc.title | Investigation of Trap Profiles of Tunneling and Blocking Layers after P/E Cycling Stress in 3-D VNAND Flash Memory | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.identifier.bibliographicCitation | 제28회 한국반도체학술대회 | - |
dc.citation.conferenceDate | 2021-01-25 | - |
dc.citation.conferencePlace | KO | - |
dc.citation.title | 제28회 한국반도체학술대회 | - |
dc.contributor.affiliatedAuthor | LEE, JEONG SOO | - |
dc.contributor.affiliatedAuthor | YOON, GILSANG | - |
dc.contributor.affiliatedAuthor | GO, DONGHYUN | - |
dc.contributor.affiliatedAuthor | JIN, JAESEOK | - |
dc.contributor.affiliatedAuthor | PARK, JOUNG HUN | - |
dc.description.journalClass | 2 | - |
dc.description.journalClass | 2 | - |
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