MTCMOS-based Ternary to Binary Converter

Abstract

Ternary logic circuits can reduce circuit power consumption and interconnections. We propose a ternary to binary converter that uses multi-threshold CMOS (MTCMOS) for energy-efficient logic converting to use these benefits. We reduce the delay by 8.61%, power by 28.72% compared to the previous design. We also reduce area, and the number of transistors compared to the existing converter design.