DC Field | Value | Language |
---|---|---|
dc.contributor.author | Bae, Kyungmin | - |
dc.contributor.author | Olveczky, Peter Csaba | - |
dc.date.accessioned | 2021-11-21T07:50:24Z | - |
dc.date.available | 2021-11-21T07:50:24Z | - |
dc.date.created | 2021-11-01 | - |
dc.date.issued | 2021-10 | - |
dc.identifier.issn | 1539-9087 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/107592 | - |
dc.description.abstract | TTA and PALS are two prominent formal design patterns-with different strengths andweaknesses-for virtually synchronous distributed cyber-physical systems (CPSs). They greatly simplify the design and verification of such systems by allowing us to design and verify their underlying synchronous designs. In this paper we introduce and verify MSYNC as a formal design (and verification) pattern/synchronizer for hierarchical multirate CPSs that generalizes, and combines the advantages of, both TTA and (single-rate and multirate) PALS. We also define an extension of TTA to multirate CPSs as a special case. We show that MSYNC outperforms both TTA and PALS in terms of allowing shorter periods, and illustrate the MSYNC design and verification approach with a case study on a fault-tolerant distributed control system for turning an airplane. | - |
dc.language | English | - |
dc.publisher | ASSOC COMPUTING MACHINERY | - |
dc.relation.isPartOf | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS | - |
dc.title | MSYNC: A Generalized Formal Design Pattern for Virtually Synchronous Multirate Cyber-physical Systems | - |
dc.type | Article | - |
dc.identifier.doi | 10.1145/3477036 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, v.20, no.5 | - |
dc.identifier.wosid | 000699999600056 | - |
dc.citation.number | 5 | - |
dc.citation.title | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS | - |
dc.citation.volume | 20 | - |
dc.contributor.affiliatedAuthor | Bae, Kyungmin | - |
dc.identifier.scopusid | 2-s2.0-85115858389 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.type.docType | Article | - |
dc.subject.keywordPlus | TIME | - |
dc.subject.keywordPlus | VERIFICATION | - |
dc.subject.keywordAuthor | Virtual synchrony | - |
dc.subject.keywordAuthor | synchronizers | - |
dc.subject.keywordAuthor | time-triggered architecture | - |
dc.subject.keywordAuthor | PALS | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Software Engineering | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
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