DC Field | Value | Language |
---|---|---|
dc.contributor.author | Daeyeon Kim | - |
dc.contributor.author | SangGi Do | - |
dc.contributor.author | Sung-Yun Lee | - |
dc.contributor.author | KANG, SEOKHYEONG | - |
dc.date.accessioned | 2021-12-03T03:23:28Z | - |
dc.date.available | 2021-12-03T03:23:28Z | - |
dc.date.created | 2020-04-10 | - |
dc.date.issued | 2020-08 | - |
dc.identifier.issn | 0278-0070 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/107796 | - |
dc.description.abstract | In bus routing, if signal bits in a bus structure share a common routing topology, routability is increased by avoiding twisted patterns and variation immunity. The bus routing problem has become significantly important because of increasing complexity of bus structures for multi-chip-module, I/O pins, or on-chip memories in advanced technology. We present and evaluate a compact topology-aware bus routing method that can both compactly synthesize the routing topology of the bus and minimize design rule violations even in designs with high bus density and high track utilization. Our proposed method completed the bus routing in the runtime limit of the ICCAD-2018 contest and achieved 66% reduction in total cost compared with the winner of that contest. | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers | - |
dc.relation.isPartOf | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | - |
dc.title | Compact Topology-aware Bus Routing for Design Regularity | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/TCAD.2019.2926484 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.39, no.8, pp.1744 - 1749 | - |
dc.identifier.wosid | 000550655600017 | - |
dc.citation.endPage | 1749 | - |
dc.citation.number | 8 | - |
dc.citation.startPage | 1744 | - |
dc.citation.title | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | - |
dc.citation.volume | 39 | - |
dc.contributor.affiliatedAuthor | Daeyeon Kim | - |
dc.contributor.affiliatedAuthor | Sung-Yun Lee | - |
dc.contributor.affiliatedAuthor | KANG, SEOKHYEONG | - |
dc.identifier.scopusid | 2-s2.0-85088709475 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | Bus routing | - |
dc.subject.keywordAuthor | design regularity | - |
dc.subject.keywordAuthor | ICCAD-2018 contest | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Interdisciplinary Applications | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
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