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A study on three-level topology applications for high-efficiency power conversion systems

Title
A study on three-level topology applications for high-efficiency power conversion systems
Authors
김준석
Date Issued
2020
Publisher
포항공과대학교
Abstract
This thesis proposes the high-efficiency three-level inverters and their control algorithms. The proposed inverters include the single-phase grid connection and the three-phase grid connection, and their rated power of the prototypes are from 1 kW to 5 kW. In case of the single-phase grid-connected inverters, the single-stage bridgeless three-level power factor correction (PFC) rectifier and the two-stage three-level photovoltaic (PV) inverter are suggested. Additionally, for the three-phase three-level inverters, the simple space vector modulation with novel dc-link voltage balancing algorithm is proposed. For the first proposal, a high efficient bridgeless three-level PFC rectifier which is a novel circuit configuration is suggested. Unlike the two-level fullbridge type PFC rectifier, the proposed recti er consists of four MOSFETs and four diodes, and they provide three di erent voltage levels which reduce power losses, harmonic components, voltage ratings, and electromagnetic interference. To control the grid current and the output voltage effiectively, a feed-forward nominal voltage compensator with the mode selector is applied; this presets the duty operating point for the grid voltage. The proposed three-level PFC rectifier with the developed control algorithm provides a high quality of power conversion and high efficiency of 99.05 %. Experimental results based on a 1 kW prototype are offered to evaluate its performance and verify the analysis. After the PFC rectifier, this thesis proposes a high efficiency two-stage threelevel grid-connected PV inverter. The proposed two-stage inverter comprises a three-level step-up converter and a three-level inverter. The three-level stepup converter not only improves the power-conversion efficiency by lowering the voltage stress of the semiconductor devices but also guarantees the balancing of the dc-link capacitor voltages by using a simple control algorithm; it also enables the proposed inverter to satisfy the VDE 0126-1-1 standard of the leakage current. The three-level inverter reduces harmonic distortion, the voltage ratings of the semiconductor device, and the electromagnetic interference because of the threelevel circuit configuration; it also enables the use of small and low-cost filters. The proposed high efficiency two-stage three-level grid-connected PV inverter overcomes the low-efficiency problem of the conventional two-stage inverters, and it provides high power quality with maximum efficiency of 97.4 %. Using a 3 kW prototype of the inverter, its performance and feasibility are proved. The last content of this thesis is a simple space vector modulation with a novel dc-link voltage balancing algorithm for easy software implementation. The proposed simple space vector modulation reduces the burden of the software implementation by eliminating the need for a sector and a region selection algorithm. Also, because the proposed modulation controls the on-state time of the switches directly, this modulation does not contain complex calculations such as the square root and the inverse trigonometric function, unlike the conventional space vector modulation. For the three-phase three-level inverters, the dc-link voltage is divided into two capacitor voltages. Therefore, it is necessary to balance the top and the bottom capacitor voltages; the unbalanced voltages raise the voltage stress of the switching devices and THD of the grid current. The proposed dc-link voltage balancing algorithm can control two dc-link capacitor voltages effectively without the additional circuit configuration. A 5 kW prototype demonstrated the feasibility and validity of the algorithms.
URI
http://postech.dcollection.net/common/orgView/200000332617
https://oasis.postech.ac.kr/handle/2014.oak/111205
Article Type
Thesis
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