A Study on Fabrication of High Performance Field Effect Transistor Based on CVD Graphene

Abstract

In this dissertation, I covered a new fabrication method of high-performance FET based on CVD graphene, which minimizes causes of electrical property degradation occurred from conventional graphene transfer and patterning process Graphene is made by carbon atoms aligning on metal catalyst, so if dielectric patterns are deposited on the metal, the graphene is synthesized only on the area where the metal surface is exposed, resulting in graphene patterns being obtained without any patterning process. When selective growth using a silicon dioxide (SiO2) patterns was conducted under conditions that single-layer graphene is synthesized on blank Cu foil (BCF), the number of layers was increased. The electrical properties of graphene significantly varies with the number of layers, so it is essential to obtain a uniform single layer graphene to achieve high carrier mobility. Therefore, Experiments to demonstrate the causes for the increase of the number of graphene layers was conducted; oxygen, hydrogen, and dielectric coverage. The effect of hydrogen was tested by controlling the amount of hydrogen flow at the synthesis stage. The synthesis of graphene by chemical vapor deposition method (CVD) consists of four stages: heating, annealing, synthesis and cooling. To control other variables, the amount of gas used in the synthesis was the same except for synthesis stage. At the heating, annealing and cooling stages, only 4 sccm of H2 was used, and at the synthesis stage, the ratio of H2 to CH4 (H2 : CH4) was used 8:20, 4:20, and 4:10 in sccm. The amount of CH4 gas was also adjusted because H2 also is decomposed from CH4. As the conditions changed to 8:20, 4:20 and 4:10, in other words, as the effect of hydrogen reduced, the increase of the number of layers was also decreased. That is, it was confirmed that the contribution of H2 became greater for some reason, resulting in the increase graphene layers compared to synthesis on BCF. To check the effect of oxygen, the synthesis was conducted using copper foil with Al2O3 and Si3N4 that were frequently used in semiconductor industries in addition to SiO2. Because of the presence of oxygen in Al2O3 film, the results on Cu foil with Al2O3 were expected to be similar to those of SiO2, and because Si3N4 film does not contain oxygen, single-layer graphene was expected to be synthesized on Cu foil with Si3N4. However, the results of synthesis demonstrated that there was no effect of oxygen in the synthesis because layer increase was found in all samples, and the degree of layer increase were similar.

Except for the existence of dielectric film, the only difference between the samples used for general growth and selective growth was the percentage of exposed Cu surface. The exposed area of Cu foil used for selective growth was about 5%, i.e., dielectric patterns cover 95% of whole Cu surface. Therefore, to check the effects of dielectric coverage, additional synthesis was conducted under H2 : CH4 =4:10 using Cu foil with 50% dielectric coverage. As a result, uniform single-layer graphene patterns were successfully grown on Cu foil with 50% dielectric coverage under H2 : CH4 = 4:10. Through Raman map, it was also verified that the distribution of single layer graphene was very uniform. This is direct evidence that H2 gas more reacted with the Cu surface, i.e., the amount of H2 reacting per unit Cu area where SiO2 was opened varies depending on the dielectric coverage on Cu foil even under the same gas flow. In the fabrication of damage-free graphene FETs, parylene-C is deposited directly on selectively-grown graphene/Cu foil. Cu foil is removed in the etching solution after the deposition, then the selectively-grown single-layer graphene is transferred to the parylene C substrate. Through this process, the graphene is completely free from the deterioration of characteristics arising from the conventional transfer and patterning processes. By using the same parylene-C used as a substrate as a gate dielectric layer, graphene can be less affected by phonon scattering than the high-k material, and the devices can also be fully-flexible. Curve fitting to the diffusive model confirmed that graphene FET created by the damage-free fabrication had 10,260 cm2/V·s of hole mobility and 10,010 cm2/V·s of electron mobility. These values were comparable to those of previously reported CVD graphene based FETs and was the best compared to those of fully-flexible graphene FETs. In this method, because the process is simplified compared to the traditional graphene FETs fabrication process and there are no factors that are affected by human, the deviation of the results is small. It is also expected to contribute greatly to the mass production of reliable, high-performance graphene transistors because this method has advantages of low-cost and production of large area graphene.