Threshold switch devices for high-density memory and logic applications

Abstract

Continuous scaling of semiconductor devices for recent few decades enabled achievement of technology nodes near 10 nm, and fabrication of devices with high- integration led to development of electronic products with superior performance. The advance of personal computers (PCs) with high performance, smart phones and tablet PCs are representative results of the recent semiconductor technology development. However, with the advent of the fourth industrial revolution, technologies such as internet of things (IoT) that enable internet access to all electronic devices and artificial intelligence (AI) have gained much interest which require huge amount of digital data near Yottabyte (1024 bytes) by 2020. This requirement is expected to increase exponentially in next few decades of years, and therefore there is a need for semiconductor devices capable of computing and storing a large amount of information with low power consumption. However, current memory and logic devices based on CMOS technologies such as DRAM, NAND flash memory, and MOSFET devices are suffering from plenty of problems as they are scaled down to few nanometers.. In the case of DRAM devices that store information by storing charge in capacitors, scaling of the devices restrict the room for capacitor area which leads to degradation in their storing capability. In the case of NAND flash devices that store information by storing charges in floating gates, the further scaling limits the number of electrons that can be accumulated in a cell which causes difficulty in controlling the device with reliability. In the case of MOSFET devices, the channel length, the gate oxide film thickness, and the line width are reduced as the scaling proceeds, which causes increase in leakage current and generation of heat. In addition, due to the physical limitation of subthreshold slope of the silicon transistor, it is inevitable that the leakage current of the transistor increases when the operation voltage is further reduced. Though lots of efforts to overcome the limit via structural modifications extend the life of the current technologies, the physical limit of the charge-based devices should be eventually overcome in order to further continue the current scaling trend. Therefore, this dissertation focuses on development of new technology based on new physical principles that can overcome the limitations of the conventional memory and logic devices. First, I demonstrate an Ag-based threshold switch device as a selector for cross-point memory applications that can replace the current charge-based memory devices. By selecting an electrolyte and controlling its interaction with the Ag filament through gas doping process, a threshold switch with required properties for high-density memory applications is designed. Investigation on the switching mechanism based on field-induced nucleation model is also conducted to understand physical parameters affecting the device. Second, I demonstrate binary telluride ovonic threshold switch (OTS) devices as another type of selector device that can complement drawbacks of the Ag-based threshold switch devices. To obtain a threshold switch device with excellent performance, the effect of composition and types of Te-based binary OTS materials on the device characteristics is investigated. Various elements considering the bond strength and atomic size are also studied, and their device characteristics are compared to understand key parameters determining the performance as an ideal switch. Simulation studies to understand the thermal stability and thermal effects induced by switching pulses are also investigated in order to confirm the device characteristics under heat-treated conditions. Moreover, I implement steep-slope transistors by integrating the two types of threshold switch devices developed in this study with a conventional MOSFET transistor. Reduced sub-threshold swing slope, diminished leakage current at low operating bias conditions, and switching speed of the implemented transistors are evaluated and requirements for the threshold switch devices to realize an ideal transistor with ultra-low power consumption are discussed based on the evaluation and simulation supports.