A Study on Ferroelectric Transistors for High-Performance Memory and Neuromorphic Device Applications

Abstract

As the production of information increases, there is an increasing demand for a high-performance memory device that can exceed the conventional memory device. Therefore, various emerging memory devices are actively be investigated to implement high-performance memory devices. Among various emerging memory devices, ferroelectric transistors, which use spontaneous polarization to store information, are promising candidates for high-performance memory devices because of their potential to obtain low power consumption, fast operation speed, and stable retention characteristics. Also, ferroelectric transistors can be used as artificial synapses. Artificial synapses are essential devices for the implementation of neuromorphic hardware systems, which can improve the efficiency of data processing by emulating the human brain. However, the development of ferroelectric transistors with high performance has been hindered because of the limitation in conventional ferroelectric materials such as low coercive electric field, complex composition, and high processing temperature. Recently, hafnia-based ferroelectric materials have been introduced as gate dielectric layers for ferroelectric transistors to overcome the issues of conventional ferroelectric materials. Hafnia-based ferroelectric materials enable the development of ferroelectric transistors with low power consumption, fast operation, and high scalability. However, ferroelectric transistors based on hafnia-based ferroelectric materials have some issues such as limited endurance and memory window characteristics, which originate from the formation of an interfacial layer between channel and ferroelectric layers. To use ferroelectric transistors as high-performance memory devices, these issues need to be solved. In this dissertation, I present the fabrication strategy of ferroelectric transistors without interfacial layer, and device application for high-performance memory and artificial synapse devices. First, to implement a ferroelectric gate stack without an interfacial layer, I introduce oxide semiconductors as channel layers of ferroelectric transistors. This fabrication strategy can suppress the formation of an interfacial layer. The developed device structure can be used to demonstrate high-performance ferroelectric memory with NAND array structure. Also, I develop artificial synapses based on ferroelectric transistors, which can achieve analog conductance modulation characteristics and photonic synaptic functions. The potential of memory and artificial synapses based on ferroelectric transistors composed of hafnia-based ferroelectric materials and oxide semiconductors is evaluated by in-depth studies, including electrical characteristics measurement, photonic characteristics measurement, device reliability test, and simulations.

In Chapter 1, I provide the theoretical background of hafnia-based ferroelectric materials and ferroelectric transistors.

In Chapter 2, I demonstrate integrated FeNAND arrays that use ferroelectric thin-film transistors (FeTFTs) fabricated using atomic layer deposition (ALD). To avoid the formation of an interfacial layer between ferroelectric and channel layers, oxide semiconductors are introduced as channel layers. The FeTFTs show fast operation speed (<10-6 s), low operation voltage (<5 V), and excellent endurance (>108 cycles) which could not be obtained by conventional flash memory. In FeNAND, the program disturbance is minimized using program-inhibit operations. NAND flash memory operations in integrated FeNAND array are demonstrated by programming and erasing FeTFT memory cells in an array structure. In addition, the demonstrated FeNAND has the potential to be used for 3D memory applications because all processes are CMOS-compatible and ferroelectric can channel layers can be deposited by using ALD. This study will open ways to implement FeNAND flash memory for future high-density 3D NAND applications.

In Chapter 3, I demonstrate the analog conductance modulation behavior and photonic synaptic characteristics in FeTFTs based on the hafnia-based ferroelectric material and oxide semiconductors. Accurate control of polarization changes in the hafnia-based ferroelectric layer induces conductance modulation to demonstrate linear potentiation and depression characteristics of FeTFTs. FeTFTs can achieve potentiation and depression properties, including high linearity, multiple states, and small cycle-to-cycle/device-to-device variations. In simulations with measured properties, a neuromorphic system with FeTFT achieves 91.1% recognition accuracy of handwritten digits. In addition, the demonstrated FeTFT can be used to obtain photonic synaptic characteristics. In FeTFTs, the persistent photoconductivity (PPC) characteristics in oxide semiconductors are exploited to demonstrate synaptic functions including short-term plasticity, paired-pulse facilitation (PPF), and long-term plasticity (LTP). The relaxation properties are controlled by the polarization of the ferroelectric layer, and this polarization is used to control the amount by which the conductance increases during PPF operation and to enhance LTP characteristics. This suggests the feasibility of FeTFTs for neuromorphic devices with analog weight update characteristics and photonic synaptic functions.