Improving Linearity of 28-GHz Two-Stage Power Amplifier in 28-nm FD-SOI CMOS Using Back-Gate Bias Control

Abstract

This paper presents a highly linear 28-GHz power amplifier (PA) with an adaptive back-gate bias control for improving IMD3 and AM-AM distortion simultaneously. Thanks to the thin buried oxide in the fully-depleted silicon-oninsulator, back-gate bias allows controlling the threshold voltage of the transistors. In order to increase the linearity of PA, each back-gate bias of driver-stage and power-stage are controlled adaptively according to the input power. The twostage common source PA was fabricated in 28-nm FD-SOI CMOS. At 28 GHz, the PA provides PSAT and PAEMAX of 14.5 dBm and 23.0%, respectively. With the adaptive back-gate bias control, IMD3 at 6 dB back-off output power is improved by around 12 dB, resulting in IMD3 < −37 dBc at 28 GHz. Meanwhile, peak AM-AM distortion remained at < 0.5 dB.