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Development of a Missing Value Imputation Method for Semiconductor Wafer Test Data Considering Spatial Similarity among Observations and Correlation between Variables

Title
Development of a Missing Value Imputation Method for Semiconductor Wafer Test Data Considering Spatial Similarity among Observations and Correlation between Variables
Authors
김주영
Date Issued
2023
Publisher
포항공과대학교
Abstract
In the semiconductor manufacturing process, wafers consist of multiple chips that are tested for quality before packaging. The data collected during this wafer test, which measures the electrical direct current voltage and characteristics of each chip, is known as wafer test data. However, missing values often occur in wafer test data due to factors such as faulty data acquisition sensors and intentional test skipping. This study presents a missing value imputation method that takes into account the spatial similarity among chips and the correlation between test items in wafer test data. The proposed method incorporates chip location information to capture the spatial tendencies of chips and modifies the loss function of Generative Adversarial Imputation Nets to preserve correlations between test items before and after imputation. The effectiveness of the proposed method is demonstrated through the application of real-world wafer test data from a domestic semiconductor company, resulting in an improvement in imputation accuracy for over 80% of test items compared to five existing methods. This improved imputation method has the potential to increase wafer yield and efficiency in manufacturing quality management.
URI
http://postech.dcollection.net/common/orgView/200000659848
https://oasis.postech.ac.kr/handle/2014.oak/118257
Article Type
Thesis
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