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Solution-processed 2D Materials for Transistors and CMOS Electronics

Title
Solution-processed 2D Materials for Transistors and CMOS Electronics
Authors
ZOU, TAOYU
Date Issued
2023
Publisher
포항공과대학교
Abstract
The use of two-dimensional (2D) semiconducting transition metal dichalcogenides (TMDs) has shown great potential for future complementary metal-oxide-semiconductor (CMOS) technology due to their atomic thickness and excellent electrical and mechanical properties. The solution-processing of 2D TMD nanomaterial dispersions has emerged as a promising method for large-scale flexible and wearable electronics, offering low-temperature processing and cost-effective manufacturing. However, the field of solution-processed CMOS electronics with 2D TMD materials is still in its early stages and requires further research. Chapter 1 provides an overview of recent progress in this field, starting with the liquid exfoliation methods commonly used to prepare 2D TMD dispersions. The production of monolayer 2D materials and deposition techniques for 2D inks are discussed, along with thin-film patterning processes for device integration. Advancements in solution-processed 2D TMD transistors and strategies for improving device performance are reviewed. Applications of solution-processed CMOS technology, such as logic circuits and ring oscillators, are highlighted. The chapter concludes with an overview of the challenges and opportunities in the development of solution-processed 2D materials and the integration of multifunctional devices for CMOS electronics. In chapter 2, hysteresis-free solution-processed MoS2 thin-film transistors is demonstrated with a significantly reduced trap density of 3.7 × 1010 cm-2·eV-1 using a PMMA dielectric in a top-gate top-contact device structure, which is much lower than that with a SiO2 back-gate dielectric layer (7.9 × 1011 cm-2). The TFTs show a field-effect mobility of 7 cm2/V s for both forward and reverse scans, with an on/off current ratio of >106. In addition, after 3000s of the bias-stress test, the drain current of the device degrades by only 7%. In chapter 3, the fabrication of high-performance printable p-type WSe2 transistors is reported via the p-doping of FeCl3 molecules (hole mobility: ~1.5 cm2 V-1 s-1; on/off ratio: ~106). A complementary inverter is demonstrated with p-WSe2 and n-MoS2 transistors, highlights its potential for application in future two-dimensional material-based printable electronics. In chapter 4, a versatile strategy of doping with Br2 to enhance the hole mobility by orders of magnitude for p-type transistors with 2D layered materials is studied. Br2-doped WSe2 transistors showed a field-effect hole mobility of more than 27 cm2 V-1 s-1, and a high on/off current ratio of ~107, and exhibits excellent operational stability during the on-off switching, cycling, and bias stressing testing. Moreover, complementary inverters composed of patterned p-type WSe2 and n-type MoS2 layered films are demonstrated with an ultra-high gain of 1280 under a driving voltage of 7 V.
URI
http://postech.dcollection.net/common/orgView/200000691141
https://oasis.postech.ac.kr/handle/2014.oak/118394
Article Type
Thesis
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