Charge storage memory utilizing Ge Quantum Dots

Abstract

To address the scalability challenges inherent in traditional memory, Quantum Dot (QD) Memory has emerged as a promising alternative. This innovative approach employs an array of quantum dots (QDs) in lieu of a bulk floating gate in traditional Flash memory, enabling faster operations and enhanced retention performance due to the thin tunnel oxide [1]. In our research, we utilize germanium (Ge) quantum dots embedded in a gate dielectric as charge storage nodes for memory operations. Ge offers superior conductivity compared to silicon (Si) and is seamlessly compatible with existing CMOS technology, as it can be synthesized through ion implantation, SiGe oxidation, and thermal annealing [2]. In the proposed device, Ge quantum dots are generated through the oxidation and annealing of a SiGe film. Low-temperature oxidation (<550°C) results in Ge becoming oxidized and chemically integrated into the oxide, forming SiGeO, as illustrated in Fig. 1 (a) and (b) [3]. Conversely, high-temperature annealing (>900°C) leads to the precipitation of Ge as quantum dots. The QD memory device follows a conventional MOSFET structure with a gate embedded with Ge QDs, as shown in Fig. 1 (b). As such, the capacitor, which hinder the integration between logic and memory, disappear, and improved operation speed provide potential capacitorless DRAM technology, which is integrable to the logic. We explore this possibilities through electrical measurements and TCAD simulations to accurately assess the potential of the device as an alternative to current 1T-DRAM technology.