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dc.contributor.authorPark, Jisung-
dc.contributor.authorAzizi, Roknoddin-
dc.contributor.authorOliveira, Geraldo F.-
dc.contributor.authorSadrosadati, Mohammad-
dc.contributor.authorNadig, Rakesh-
dc.contributor.authorNovo, David-
dc.contributor.authorGomez-Luna, Juan-
dc.contributor.authorKim, Myungsuk-
dc.contributor.authorMutlu, Onur-
dc.date.accessioned2024-03-05T09:41:10Z-
dc.date.available2024-03-05T09:41:10Z-
dc.date.created2024-03-04-
dc.date.issued2022-10-02-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/121158-
dc.description.abstractBulk bitwise operations, i. e., bitwise operations on large bit vectors, are prevalent in a wide range of important application domains, including databases, graph processing, genome analysis, cryptography, and hyper-dimensional computing. In conventional systems, the performance and energy efficiency of bulk bitwise operations are bottlenecked by data movement between the compute units (e.g., CPUs and GPUs) and the memory hierarchy. In-flash processing (i. e., processing data inside NAND flash chips) has a high potential to accelerate bulk bitwise operations by fundamentally reducing data movement through the entire memory hierarchy, especially when the processed data does not fit into main memory. We identify two key limitations of the state-of-the-art in-flash processing technique for bulk bitwise operations; (i) it falls short of maximally exploiting the bit-level parallelism of bulk bitwise operations that could be enabled by leveraging the unique cell-array architecture and operating principles of NAND flash memory; (ii) it is unreliable because it is not designed to take into account the highly error-prone nature of NAND flash memory. We propose Flash-Cosmos (Flash C omputation with-O ne-S hot M ulti-O perand S ensing), a new in-flash processing technique that significantly increases the performance and energy efficiency of bulk bitwise operations while providing high reliability. Flash-Cosmos introduces two key mechanisms that can be easily supported in modern NAND flash chips: (i) M ulti-W ordline S ensing (MWS), which enables bulk bitwise operations on a large number of operands (tens of operands) with a single sensing operation, and (ii) E nhanced S LC-mode P rogramming (ESP), which enables reliable computation inside NAND flash memory. We demonstrate the feasibility of performing bulk bitwise operations with high reliability in Flash-Cosmos by testing 160 real 3D NAND flash chips. Our evaluation shows that Flash-Cosmos improves average performance and energy efficiency by 3.5 × /32 × and 3.3 × /95 ×, respectively, over the state-of-the-art in-flash/outside-storage processing techniques across three real-world applications.-
dc.languageEnglish-
dc.publisherIEEE Computer Society-
dc.relation.isPartOf55th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2022-
dc.relation.isPartOfProceedings of the Annual International Symposium on Microarchitecture, MICRO-
dc.titleFlash-Cosmos: In-Flash Bulk Bitwise Operations Using Inherent Computation Capability of NAND Flash Memory-
dc.typeConference-
dc.type.rimsCONF-
dc.identifier.bibliographicCitation55th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2022, pp.937 - 955-
dc.citation.conferenceDate2022-10-01-
dc.citation.conferencePlaceUS-
dc.citation.endPage955-
dc.citation.startPage937-
dc.citation.title55th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2022-
dc.contributor.affiliatedAuthorPark, Jisung-
dc.description.journalClass1-
dc.description.journalClass1-

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박지성PARK, JISUNG
Dept of Computer Science & Enginrg
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