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Machine Learning-based Fast Circuit Simulation for Analog Circuit Array

Title
Machine Learning-based Fast Circuit Simulation for Analog Circuit Array
Authors
KANG, SEOKHYEONGLee, JaeseungPark, SejinKweon, Minhyeok
Date Issued
2023-09-10
Publisher
Institute of Electrical and Electronics Engineers Inc.
Abstract
Fast circuit simulation offers quick verification and exploration of a wide design space for analog circuit arrays (e.g., display panel). However, as the size of analog circuit arrays increases, the simulation complexity of traditional methods like SPICE analysis becomes excessively challenging. In this work, we introduce a machine learning-based circuit simulation to reduce the complexity without accuracy loss. We propose a novel machine learning model, Initial Hidden state Embedded Convolution Long Short-Term Memory (IHE-CLSTM) to effectively process sequential data and input design parameters at once. In addition, the model can completely decompose the circuit array into individual components and enable complete parallel simulations of individual components. Our experimental results demonstrate that our method achieves average runtime improvements of 66.01% and 79.11% compared to the golden SPICE simulation results for various input parameters and circuit sizes, respectively. Moreover, it effectively performs interpolation and extrapolation for unseen parameters and sizes of circuit arrays, and has a linear time complexity with respect to the size of circuit arrays.
URI
https://oasis.postech.ac.kr/handle/2014.oak/121896
Article Type
Conference
Citation
5th ACM/IEEE Workshop on Machine Learning for CAD, MLCAD 2023, 2023-09-10
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