A Memory-Efficient Architecture of Full HD Around View Monitor Systems

Abstract

The around view monitor (AVM) is one of the representative features of smart vision systems adopted in various application areas, e.g., advanced driver assistance systems. The design of AVM systems with full high-definition (HD)-level resolution presents significant technical challenges. In particular, a high-memory performance is required to process full HD images obtained from multiple cameras. Specifically, a full HD AVM system requires a high-memory bandwidth (six times higher than D1 image-based systems) and is characterized by a significant amount of single writes, which degrades the effective performance of modern DRAM. To address these problems, two methods are proposed in this paper. The first method reduces the required memory bandwidth by storing in the memory only the input pixel data that will be used in the final processing step, and the second improves the single-write performance of a DRAM subsystem by DRAM-aware data mapping. The effectiveness of the proposed methods is proved by designing an AVM system incorporating field-programmable gate arrays and DDR2-200 SDRAMs. The proposed methods reduce the memory bandwidth requirement by 51%, allowing a full HD AVM system to run at over 24 frames per second.