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Cited 5 time in webofscience Cited 5 time in scopus
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dc.contributor.authorKim, C-
dc.contributor.authorKim, H-
dc.contributor.authorKang, B-
dc.date.accessioned2016-03-31T07:50:02Z-
dc.date.available2016-03-31T07:50:02Z-
dc.date.created2015-02-04-
dc.date.issued2014-11-
dc.identifier.issn0026-2714-
dc.identifier.other2015-OAK-0000031196-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/14061-
dc.description.abstractThis paper investigates voltage-dependent degradation of HfSiON/SiO2 nMOSFETs under conditions of positive bias temperature instability (PBTI), and proposes a PBTI degradation model that can use data from acceleration tests to predict device lifetime accurately. Experimental results show that the PBTI stress generated shallow traps in HfSiON and the exponent of power-law for threshold-voltage shift increased exponentially with an increase of PBTI stress voltage. An enhancement factor that represents creation of shallow charge traps in gate dielectric by PBTI stress was included in the proposed model. The proposed model predicted operational lifetime t(L) = 1.64 x 10(10) s, which agreed well with the t(L) = 1.92 x 10(10) s measured at low gate stress voltage, whereas the conventional model overestimates t(L) by an order of magnitude, demonstrating that the proposed model is very useful on shortening the measurement time for estimating t(L) of high-k nMOSFETs. (C) 2014 Elsevier Ltd. All rights reserved.-
dc.description.statementofresponsibilityX-
dc.languageEnglish-
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD-
dc.relation.isPartOfMICROELECTRONICS RELIABILITY-
dc.subjectHigh-k dielectrics-
dc.subjectPositive bias temperature instability (PBTI)-
dc.subjectElectron trap-
dc.subjectFN stress-
dc.subjectShallow traps-
dc.subjectGATE DIELECTRIC STACKS-
dc.subjectINTERFACE TRAPS-
dc.subjectMECHANISM-
dc.subjectSTRESS-
dc.titleVoltage dependent degradation of HfSiON/SiO2 nMOSFETs under positive bias temperature instability-
dc.typeArticle-
dc.contributor.college전자전기공학과-
dc.identifier.doi10.1016/J.MICROREL.2014.06.001-
dc.author.googleKim, C-
dc.author.googleKim, H-
dc.author.googleKang, B-
dc.relation.volume54-
dc.relation.issue11-
dc.relation.startpage2383-
dc.relation.lastpage2387-
dc.contributor.id10071834-
dc.relation.journalMICROELECTRONICS RELIABILITY-
dc.relation.indexSCI급, SCOPUS 등재논문-
dc.relation.sciSCI-
dc.collections.nameJournal Papers-
dc.type.rimsART-
dc.identifier.bibliographicCitationMICROELECTRONICS RELIABILITY, v.54, no.11, pp.2383 - 2387-
dc.identifier.wosid000346212900007-
dc.date.tcdate2019-01-01-
dc.citation.endPage2387-
dc.citation.number11-
dc.citation.startPage2383-
dc.citation.titleMICROELECTRONICS RELIABILITY-
dc.citation.volume54-
dc.contributor.affiliatedAuthorKang, B-
dc.identifier.scopusid2-s2.0-84911421404-
dc.description.journalClass1-
dc.description.journalClass1-
dc.description.wostc3-
dc.description.scptc2*
dc.date.scptcdate2018-05-121*
dc.type.docTypeArticle-
dc.subject.keywordPlusINTERFACE TRAPS-
dc.subject.keywordPlusGATE-
dc.subject.keywordPlusMECHANISM-
dc.subject.keywordAuthorHigh-k dielectrics-
dc.subject.keywordAuthorPositive bias temperature instability (PBTI)-
dc.subject.keywordAuthorElectron trap-
dc.subject.keywordAuthorFN stress-
dc.subject.keywordAuthorShallow traps-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryNanoscience & Nanotechnology-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaScience & Technology - Other Topics-
dc.relation.journalResearchAreaPhysics-

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강봉구KANG, BONG KOO
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