Far-End Crosstalk Compensation Circuits for Parallel Microstrip Lines by Using Capacitive-Coupling at Transmitter and Crosstalk-Cancelling Pulse at Receiver

Abstract

Circuits are proposed for transmitter and receiver to compensate for the far-end crosstalk (FEXT) of parallel microstrip lines on printed-circuit board (PCB).The transmitter circuit couples the input voltage waveform of an output driver to the output nodes of two adjacent output drivers through a series connection of a capacitor and a compensating driver. The measured bathtub curve shows that the transmitter chip with a 0.13m CMOS process increase the time opening with BER < 1E-12 from 0.04UI to 0.56US at 4.2Gbps.The receiver circuit adds a crosstalk-cancelling pulse to two adjacent input signals to reduce FEXT during the signal transition period, and uses 1-tap decision feedback equalization (DFE) to reduce inter-symbol interference (ISI). The receiver chip, which was applied to a 0.18m CMOS process, increases the maximum data rate with BER < 1E-12 form 2.5Gbps to 3.6Gbps, in a strongly-coupled 2-parallel 2-drom single-ended microstrip SSTL memory channel.