Design and implementation of a private and public key crypto processor and its application to a security system
SCIE
SCOPUS
- Title
- Design and implementation of a private and public key crypto processor and its application to a security system
- Authors
- Kim, H; Lee, S
- Date Issued
- 2004-02
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGI
- Abstract
- This paper presents the design and implementation Of a crypto processor, a special-purpose. microprocessor optimized for the execution of cryptography algorithms. This crypto processor, can be used for various security applications such as storage devices, embedded systems, network routers, security gateways using IPSec and SSL protocol, etc. The crypto processor consists of a 32-bit RISC processor block and coprocessor blocks dedicated to. the AES, KASUMI, SEED,, triple-DES private key crypto algorithms and ECC and RSA public key crypto. algorithm. The dedicated coprocessor block permits fast execution of encryption, decryption, and key scheduling operations. The 32-bit RISC processor block can be used to execute various crypto algorithms such as Hash and other application programs such as user authentication and IC card interface. The crypto processor has been designed and implemented using an FPGA, and some par is of crypto algorithms have been fabricated as a single VLSI chip using 0.5 mum CMOS technology. To test and demonstrate the capabilities of this chip, a custom board providing real-time data security for a data storage de-ice has been developed.
- Keywords
- crypto processor; security; AES; KASUMI; SEED; triple-DES; ECC; RSA
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/18022
- DOI
- 10.1109/TCE.2004.1277865
- ISSN
- 0098-3063
- Article Type
- Article
- Citation
- IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, vol. 50, no. 1, page. 214 - 224, 2004-02
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