DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jeong, H | - |
dc.contributor.author | Park, JH | - |
dc.contributor.author | Ryu, HY | - |
dc.contributor.author | Kwon, JB | - |
dc.contributor.author | Oh, Y | - |
dc.date.accessioned | 2016-03-31T13:05:24Z | - |
dc.date.available | 2016-03-31T13:05:24Z | - |
dc.date.created | 2009-02-28 | - |
dc.date.issued | 2002-04 | - |
dc.identifier.issn | 0018-9251 | - |
dc.identifier.other | 2002-OAK-0000002689 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/19046 | - |
dc.description.abstract | As a step towards a real-time signal aperture radar (SAR) correlator, custom very large scale integration (VLSI) architectures are developed. Considering the extremely short word length of the data, we derive three architectures with massive parallelism in bit space. Unlike frequency methods, no degradation is introduced during convolution. Optimized for time and space, they are highly suited to VLSI implementation, and a small architecture with 80 taps operating at 10 MHz has been built using an FPGA. | - |
dc.description.statementofresponsibility | X | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGI | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS | - |
dc.subject | MIGRATION | - |
dc.subject | COMPENSATION | - |
dc.title | VLSI architecture for SAR data compression | - |
dc.type | Article | - |
dc.contributor.college | 전자전기공학과 | - |
dc.identifier.doi | 10.1109/TAES.2002.1008977 | - |
dc.author.google | Jeong, H | - |
dc.author.google | Park, JH | - |
dc.author.google | Ryu, HY | - |
dc.author.google | Kwon, JB | - |
dc.author.google | Oh, Y | - |
dc.relation.volume | 38 | - |
dc.relation.issue | 2 | - |
dc.relation.startpage | 427 | - |
dc.relation.lastpage | 440 | - |
dc.contributor.id | 10071832 | - |
dc.relation.journal | IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS | - |
dc.relation.index | SCI급, SCOPUS 등재논문 | - |
dc.relation.sci | SCI | - |
dc.collections.name | Journal Papers | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS, v.38, no.2, pp.427 - 440 | - |
dc.identifier.wosid | 000176062300007 | - |
dc.date.tcdate | 2019-01-01 | - |
dc.citation.endPage | 440 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 427 | - |
dc.citation.title | IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS | - |
dc.citation.volume | 38 | - |
dc.contributor.affiliatedAuthor | Jeong, H | - |
dc.identifier.scopusid | 2-s2.0-0036544412 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 7 | - |
dc.type.docType | Article | - |
dc.relation.journalWebOfScienceCategory | Engineering, Aerospace | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Telecommunications | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Telecommunications | - |
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