Shift scheduling for steppers in the semiconductor wafer fabrication process
SCIE
SCOPUS
- Title
- Shift scheduling for steppers in the semiconductor wafer fabrication process
- Authors
- Kim, S; Yea, SH; Kim, B
- Date Issued
- 2002-02
- Publisher
- KLUWER ACADEMIC PUBL
- Abstract
- In this paper, an approach is proposed for scheduling stepper machines that are acting as bottleneck machines in the semiconductor wafer fabrication process. We consider the problem of scheduling the steppers for an 8 hour shift, determining which types of wafer lots to work on each machine. The scheduling objective is to find the optimal stepper allocations such that the schedule meets target production quantities that have been derived from the given target Work-In-Process (WIP) levels. A Mixed Integer Programming (MIP) model is formulated, and three heuristic approaches are proposed and tested to approximately solve the MIP model. Numerical tests show that one of the proposed heuristics using linear programming relaxation of MIP generates, on average, schedules within 5% of the optimum values.
- Keywords
- INDUSTRY; MODELS
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/19375
- DOI
- 10.1023/A:1011995914535
- ISSN
- 0740-817X
- Article Type
- Article
- Citation
- IIE TRANSACTIONS, vol. 34, no. 2, page. 167 - 177, 2002-02
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- There are no files associated with this item.
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