DC Field | Value | Language |
---|---|---|
dc.contributor.author | Im, GH | - |
dc.contributor.author | Shanbhag, NR | - |
dc.date.accessioned | 2016-03-31T13:51:22Z | - |
dc.date.available | 2016-03-31T13:51:22Z | - |
dc.date.created | 2010-01-27 | - |
dc.date.issued | 1998-08 | - |
dc.identifier.issn | 1053-587X | - |
dc.identifier.other | 1998-OAK-0000000317 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/20710 | - |
dc.description.abstract | A near-end crosstalk (NEXT) canceller using a fine-grain pipelined architecture is presented. Performance. of the proposed pipelined NEXT canceller is demonstrated in the 125 Mb/s twisted-pair distributed data interface and 155.52 Mb/s asynchronous transfer mode local area network applications. In addition, we analyze the computational complexity of the proposed pipelined NEXT canceller. It is shown that this architecture can be clocked at a rate that is 107 times faster than the serial architecture with a maximum loss of 2.0 dB in signal-to-noise ratio (SNR). | - |
dc.description.statementofresponsibility | X | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGI | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON SIGNAL PROCESSING | - |
dc.subject | echo canceller | - |
dc.subject | equalizer | - |
dc.subject | LAN | - |
dc.subject | NEXT | - |
dc.subject | NEXT canceller | - |
dc.subject | pipelining | - |
dc.subject | VLSI implementation | - |
dc.title | A pipelined adaptive NEXT canceller | - |
dc.type | Article | - |
dc.contributor.college | 전자전기공학과 | - |
dc.identifier.doi | 10.1109/78.705453 | - |
dc.author.google | Im, GH | - |
dc.author.google | Shanbhag, NR | - |
dc.relation.volume | 46 | - |
dc.relation.issue | 8 | - |
dc.relation.startpage | 2252 | - |
dc.relation.lastpage | 2258 | - |
dc.contributor.id | 10054306 | - |
dc.relation.journal | IEEE TRANSACTIONS ON SIGNAL PROCESSING | - |
dc.relation.index | SCI급, SCOPUS 등재논문 | - |
dc.relation.sci | SCI | - |
dc.collections.name | Journal Papers | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON SIGNAL PROCESSING, v.46, no.8, pp.2252 - 2258 | - |
dc.identifier.wosid | 000075022300023 | - |
dc.date.tcdate | 2019-01-01 | - |
dc.citation.endPage | 2258 | - |
dc.citation.number | 8 | - |
dc.citation.startPage | 2252 | - |
dc.citation.title | IEEE TRANSACTIONS ON SIGNAL PROCESSING | - |
dc.citation.volume | 46 | - |
dc.contributor.affiliatedAuthor | Im, GH | - |
dc.identifier.scopusid | 2-s2.0-0032140226 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 5 | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | echo canceller | - |
dc.subject.keywordAuthor | equalizer | - |
dc.subject.keywordAuthor | LAN | - |
dc.subject.keywordAuthor | NEXT | - |
dc.subject.keywordAuthor | NEXT canceller | - |
dc.subject.keywordAuthor | pipelining | - |
dc.subject.keywordAuthor | VLSI implementation | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
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