DC Field | Value | Language |
---|---|---|
dc.contributor.author | LEE, SK | - |
dc.contributor.author | CHOE, SM | - |
dc.contributor.author | AHN, CG | - |
dc.contributor.author | CHUNG, WJ | - |
dc.contributor.author | KWON, YK | - |
dc.contributor.author | KANG, BK | - |
dc.contributor.author | KIM, O | - |
dc.contributor.author | 강봉구 | - |
dc.date.accessioned | 2016-03-31T14:12:54Z | - |
dc.date.available | 2016-03-31T14:12:54Z | - |
dc.date.issued | 1997-01 | - |
dc.identifier.citation | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | - |
dc.identifier.citation | v.36 | - |
dc.identifier.citation | no.3B | - |
dc.identifier.citation | pp.1389-1393 | - |
dc.identifier.issn | 0021-4922 | - |
dc.identifier.other | 1997-OAK-0000009724 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/21349 | - |
dc.description.abstract | N-channel and p-channel metal-oxide-semiconductor (MOS) thin-film transistors (TFT's) have been fabricated on rapid thermal chemical vapor deposition (RTCVD) polycrystalline silicon-germanium (poly-Si0.88Ge0.12) films by a low temperature (less than or equal to 550 degrees C) process. These devices employ in-situ n(+) doped poly-Si0.65Ge0.35 films as gate electrodes to reduce the process time and temperature, dual-offset spacers to reduce the electric field in the drain junction region, and silicon capping layers to protect the poly-Si1-xGex films against oxygen. The I-d-V-g characteristics in n-channel TFT's, as well as in p-channel TFT's, exhibit good behavior after remote-PECVD hydrogenation. Further improvements on electrical properties in n-channel TFT's are limited by trap-inducing Ge behaviors in poly-Si1-xGex films. | - |
dc.description.statementofresponsibility | X | - |
dc.publisher | JAPAN J APPLIED PHYSICS | - |
dc.subject | polycrystalline silicon germanium | - |
dc.subject | TFT | - |
dc.subject | low temperature | - |
dc.subject | CMOS TFT | - |
dc.subject | RTCVD | - |
dc.subject | OPTICAL-PROPERTIES | - |
dc.subject | TRANSISTORS | - |
dc.subject | ALLOYS | - |
dc.title | Low temperature (<=550 degrees C) fabrication of CMOS TFT's on rapid-thermal CVD polycrystalline silicon-germanium films | - |
dc.type | Conference | - |
dc.contributor.college | 전자전기공학과 | - |
dc.author.google | LEE, SK | - |
dc.author.google | CHOE, SM | - |
dc.author.google | AHN, CG | - |
dc.author.google | CHUNG, WJ | - |
dc.author.google | KWON, YK | - |
dc.author.google | KANG, BK | - |
dc.author.google | KIM, O | - |
dc.relation.volume | 36 | - |
dc.relation.issue | 3B | - |
dc.relation.startpage | 1389 | - |
dc.relation.lastpage | 1393 | - |
dc.contributor.id | 10071834 | - |
dc.publisher.location | JA | - |
dc.relation.journal | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | - |
dc.relation.index | SCI급, SCOPUS 등재논문 | - |
dc.relation.sci | SCI | - |
dc.collections.name | Conference Papers | - |
dc.type.docType | Proceedings Paper | - |
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