DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, JG | - |
dc.contributor.author | Ihn, B | - |
dc.contributor.author | Kim, B | - |
dc.contributor.author | Lee, KG | - |
dc.contributor.author | Lee, W | - |
dc.contributor.author | Lee, SW | - |
dc.date.accessioned | 2016-03-31T14:22:40Z | - |
dc.date.available | 2016-03-31T14:22:40Z | - |
dc.date.created | 2009-03-18 | - |
dc.date.issued | 1996-04 | - |
dc.identifier.issn | 0038-1101 | - |
dc.identifier.other | 1996-OAK-0000009365 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/21616 | - |
dc.description.abstract | An extraction method for device dimensions and the lateral channel doping profile of a vertical double-diffused MOS transistor has been developed. Using C-V characterization and two-dimensional numerical analysis, the lateral device structure parameter could be extracted. The extracted device parameters are in good agreement with the expected values for a fabricated device sample. The proposed method in this paper can be very useful for analysing the electrical characteristics of VDMOS transistors. | - |
dc.description.statementofresponsibility | X | - |
dc.language | English | - |
dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | - |
dc.relation.isPartOf | SOLID-STATE ELECTRONICS | - |
dc.title | Extraction of lateral device parameters and channel doping profile of vertical double-diffused MOS transistors | - |
dc.type | Article | - |
dc.contributor.college | 전자전기공학과 | - |
dc.identifier.doi | 10.1016/0038-1101(95)00187-5 | - |
dc.author.google | Kim, JG | - |
dc.author.google | Ihn, B | - |
dc.author.google | Kim, B | - |
dc.author.google | Lee, KG | - |
dc.author.google | Lee, W | - |
dc.author.google | Lee, SW | - |
dc.relation.volume | 39 | - |
dc.relation.issue | 4 | - |
dc.relation.startpage | 541 | - |
dc.relation.lastpage | 546 | - |
dc.contributor.id | 10106173 | - |
dc.relation.journal | SOLID-STATE ELECTRONICS | - |
dc.relation.index | SCI급, SCOPUS 등재논문 | - |
dc.relation.sci | SCI | - |
dc.collections.name | Journal Papers | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | SOLID-STATE ELECTRONICS, v.39, no.4, pp.541 - 546 | - |
dc.identifier.wosid | A1996UC22800017 | - |
dc.date.tcdate | 2019-01-01 | - |
dc.citation.endPage | 546 | - |
dc.citation.number | 4 | - |
dc.citation.startPage | 541 | - |
dc.citation.title | SOLID-STATE ELECTRONICS | - |
dc.citation.volume | 39 | - |
dc.contributor.affiliatedAuthor | Kim, B | - |
dc.identifier.scopusid | 2-s2.0-0030130112 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 6 | - |
dc.type.docType | Article | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
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