양자 효과를 고려한 실리콘 나노선 트랜지스터의 저주파 잡음 특성 분석 및 모델링

Abstract

Nanowire Field-Effect Transistor (NWFET) has been successfully fabricated by Samsun Electronics with surrounding metal gate around nanowire channel region. Channel diameter (dNW) is a key factor in using Gate-All-Around (GAA) structure for further scaling or vertical pillar structure in long-term technology aspect. The low frequency noise has been recognized as an important technique with which one can evaluate dielectric quality, which directly influences device performances. It is necessity to investigate the low frequency noise characteristics in GAA structure with various dNW. Due to ultra scaled cross-sectional area of the nanowire channel, the inversion carriers exist in the entire volume of the Si film, which is called volume inversion. Simulation results indicate that this phenomenon originates from the quantum confinement of the carriers with widened bandgap. The volume inversion can enhance the electrical performance, resulting from the quantum confinement. The volume inversion can make the flow of channel carriers apart from Si-SiO2 interface with reducing the surface roughness scattering. Low frequency noise in n-type NWFET (n-NWFET) is described by the unified 1/f noise model, where the major noise sources are a) the carrier number fluctuation induced by trapping/detrapping of electrons into/out of oxide defects and b) mobility fluctuation due to the Coulomb scattering between carriers and charged traps. These noise components are located near the interface and sensitive to the volume inversion can affect the noise characteristics since this effect can reduce the charge density at the Si-SiO2 interface. Volume inversion is enhanced in its extent as dNW decreases, which can effectively suppress the noise sources. The noise amplitude also decreases in smaller nanowires as opposed to the expectation of the unified 1/f noise model. Extracted and calculated results of the noise parameters such as effective oxide trap density Not and Coulomb scattering coefficient  support the dNW dependence of low frequency noise in n-NWFET.In p-type NWFET (p-NWFET), the low frequency noise shows diametrical dNW dependence compared to that of n-NWFETs. This is because the major noise source that governs the low frequency noise in p-NWFET is generated by Hooge mobility fluctuation. Since the Hooge mobility fluctuation noise component comes from the phonon scattering of the Si lattice, the noise sources are not limited to the interface, and the volume inversion hardly affects the low frequency noise behaviors in p-NWFET, which can be supported by the experiment setup using periodically switched bias to gate terminal during the noise measurement by selectively suppressing the number-fluctuation noise component. Smaller reduction in the noise amplitude of the p-NWFET compared to the n-NWFET indicates that the carrier number fluctuation noise source barely contributes to the noise of the p-NWFET. The difference in noise sources and their locations in n- and p-channel nanowire is due to the embedded SiGe (e-SG) layer on source/drain region. The e-SG layer induces compressive stress to p-type channel and increases hole effective mass along gate-to-channel direction. This is corroborated by extracting the surface roughness scattering rate and comparing the gate tunneling current of n- and p-NWFET. Increment of hole effective mass in transverse direction can suppress the tunneling and trapping/detrapping of holes to oxide defects, resulting in the reduction by carrier number fluctuation. The length dependence of the low frequency noise in p-NWFET and the extracted Hooge parameter also support the previous discussions.