A FPGA architecture of blind source separation and real time implementation
SCIE
SCOPUS
- Title
- A FPGA architecture of blind source separation and real time implementation
- Authors
- Kim, Y; Jeong, H
- Date Issued
- 2005-01
- Publisher
- SPRINGER-VERLAG BERLIN
- Abstract
- Blind source separation (BSS) of independent sources from their convolutive mixtures is a problem in many real-world multi-sensor applications. However, the existing BSS architectures are more often than not based upon software and thus not suitable for direct implementation on hardware. In this paper, we present a new VLSI architecture for the blind source separation of a multiple input mutiple output (MIMO) measurement system. The algorithm is based on feedback network and is highly suited for parallel processing. The implementation is designed to operate in real time for speech signal sequences. It is systolic and easily scalable by simple adding and connecting chips or modules. In order to verify the proposed architecture, we have also designed and implemented it in a hardware prototyping with Xilinx FPGAs.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/24494
- DOI
- 10.1007/11499305_36
- ISSN
- 0302-9743
- Article Type
- Article
- Citation
- LECTURE NOTES IN COMPUTER SCIENCE, vol. 3562, page. 347 - 356, 2005-01
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- There are no files associated with this item.
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