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ANALOG PREDISTORTION LINEARIZATION OF DOHERTY POWER AMPLIFIERS USING BANDWIDTH REDUCTION OF ERROR SIGNAL SCIE SCOPUS
- Title
- ANALOG PREDISTORTION LINEARIZATION OF DOHERTY POWER AMPLIFIERS USING BANDWIDTH REDUCTION OF ERROR SIGNAL
- Date Issued
- 2010-06
- Publisher
- JOHN WILEY & SONS INC
- Abstract
- This article represents analog predistortion linearization of Doherty power amplifier (DPA) using bandwidth reduction of error signal. To verify our methods, two DPAs are implemented using a push-pull GaN HEMT and a push-pull Si LDMOS at 2.14 GHz and tested using the memory-compensated analog predistorter with transistor-based error generators and three-branch nonlinear paths. From the measured four-carrier WCDMA results, the proposed analog predistortion DPAs show the significant linearity improvement. (C) 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1313-1316, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25190
- Keywords
- analog predistorter; Doherty amplifier; linearity; memory effects; power amplifier
- ISSN
- 0895-2477
- Article Type
- Article
- Citation
- MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, vol. 52, no. 6, page. 1313 - 1316, 2010-06
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- 정윤하JEONG, YOON HA
- Dept of Electrical Enginrg