DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chanha Kim | - |
dc.contributor.author | Chanik Park | - |
dc.contributor.author | Sungjoo Yoo | - |
dc.contributor.author | Lee, S | - |
dc.date.accessioned | 2016-04-01T07:36:40Z | - |
dc.date.available | 2016-04-01T07:36:40Z | - |
dc.date.created | 2015-07-12 | - |
dc.date.issued | 2015-05 | - |
dc.identifier.issn | 0098-3063 | - |
dc.identifier.other | 2015-OAK-0000033432 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/26688 | - |
dc.description.abstract | Demand for flash memory based storage systems is on the rise because flash memory has many advantages when compared with hard disk drives, such as lower latency and resistance to physical shock. However, flash memory permits only a limited number of program/erase (P/E) cycles, and after the guaranteed number of P/E cycles, data cannot be reliably retrieved due to uncorrectable errors. Given a target bit error rate, the guaranteed number of P/E cycles decreases as more bits are stored in one cell and as the cell size is scaled down. In this paper, a novel lifetime extension mechanism for flash memory, referred to as a gradual error correction code (G-ECC), is proposed. A G-ECC provides a stronger level of error correction than a standard ECC by sacrificing a small portion of storage capacity in order to store additional parity bits. The proposed method can extend the lifetime of flash memory by 124% at the cost of a 12% loss in capacity. The use of additional parity bits necessarily leads to performance loss due to increased accesses for those additional parity bits and garbage collection operations involving those bits. Thus, methods to alleviate such performance loss are proposed; these methods reduce the performance overhead from 17% (without the proposed methods) to 3% even in the worst case.(1) | - |
dc.description.statementofresponsibility | X | - |
dc.language | English | - |
dc.publisher | IEEE | - |
dc.relation.isPartOf | IEEE Transactions on Consumer Electronics | - |
dc.title | Extending Lifetime of Flash Memory Using Strong Error Correction Coding | - |
dc.type | Article | - |
dc.contributor.college | 전자전기공학과 | - |
dc.identifier.doi | 10.1109/TCE.2015.7150595 | - |
dc.author.google | Kim, C. | - |
dc.author.google | Park, C. | - |
dc.author.google | Yoo, S. | - |
dc.author.google | Lee, S. | - |
dc.relation.volume | 61 | - |
dc.relation.issue | 2 | - |
dc.relation.startpage | 206 | - |
dc.relation.lastpage | 214 | - |
dc.contributor.id | 10077436 | - |
dc.relation.journal | IEEE Transactions on Consumer Electronics | - |
dc.relation.sci | SCI | - |
dc.collections.name | Journal Papers | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE Transactions on Consumer Electronics, v.61, no.2, pp.206 - 214 | - |
dc.identifier.wosid | 000357803600010 | - |
dc.date.tcdate | 2019-02-01 | - |
dc.citation.endPage | 214 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 206 | - |
dc.citation.title | IEEE Transactions on Consumer Electronics | - |
dc.citation.volume | 61 | - |
dc.contributor.affiliatedAuthor | Lee, S | - |
dc.identifier.scopusid | 2-s2.0-84946914141 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 2 | - |
dc.description.isOpenAccess | N | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | NAND flash memory | - |
dc.subject.keywordAuthor | error correction code | - |
dc.subject.keywordAuthor | flash memory lifetime | - |
dc.subject.keywordAuthor | reliability | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Telecommunications | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Telecommunications | - |
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