DC Field | Value | Language |
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dc.contributor.author | Jang, JW | - |
dc.contributor.author | Park, S | - |
dc.contributor.author | Burr, GW | - |
dc.contributor.author | Hwang, H | - |
dc.contributor.author | JEONG, YOON HA | - |
dc.date.accessioned | 2016-04-01T07:54:06Z | - |
dc.date.available | 2016-04-01T07:54:06Z | - |
dc.date.created | 2015-06-23 | - |
dc.date.issued | 2015-05 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.other | 2015-OAK-0000032783 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/26997 | - |
dc.description.abstract | The optimization of conductance change behavior in synaptic devices based on analog resistive memory is studied for the use in neuromorphic systems. Resistive memory based on Pr1-xCaxMnO3 (PCMO) is applied to a neural network application (classification of Modified National Institute of Standards and Technology handwritten digits using a multilayer perceptron trained with backpropagation) under a wide variety of simulated conductance change behaviors. Linear and symmetric conductance changes (e.g., self-similar response during both increasing and decreasing device conductance) are shown to offer the highest classification accuracies. Further improvements can be obtained using nonidentical training pulses, at the cost of requiring measurement of individual conductance during training. Such a system can be expected to achieve, with our existing PCMO-based synaptic devices, a generalization accuracy on a previously-unseen test set of 90.55%. These results are promising for hardware demonstration of high neuromorphic accuracies using existing synaptic devices. | - |
dc.description.statementofresponsibility | X | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.relation.isPartOf | IEEE ELECTRON DEVICE LETTERS | - |
dc.title | Optimization of Conductance Change in Pr1-xCaxMnO3-Based Synaptic Devices for Neuromorphic Systems | - |
dc.type | Article | - |
dc.contributor.college | 전자전기공학과 | - |
dc.identifier.doi | 10.1109/LED.2015.2418342 | - |
dc.author.google | Jang, JW | - |
dc.author.google | Park, S | - |
dc.author.google | Burr, GW | - |
dc.author.google | Hwang, H | - |
dc.author.google | Jeong, YH | - |
dc.relation.volume | 36 | - |
dc.relation.issue | 5 | - |
dc.relation.startpage | 457 | - |
dc.relation.lastpage | 459 | - |
dc.contributor.id | 10106021 | - |
dc.relation.journal | IEEE ELECTRON DEVICE LETTERS | - |
dc.relation.sci | SCI | - |
dc.collections.name | Journal Papers | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE ELECTRON DEVICE LETTERS, v.36, no.5, pp.457 - 459 | - |
dc.identifier.wosid | 000353566300012 | - |
dc.date.tcdate | 2019-02-01 | - |
dc.citation.endPage | 459 | - |
dc.citation.number | 5 | - |
dc.citation.startPage | 457 | - |
dc.citation.title | IEEE ELECTRON DEVICE LETTERS | - |
dc.citation.volume | 36 | - |
dc.contributor.affiliatedAuthor | Hwang, H | - |
dc.contributor.affiliatedAuthor | JEONG, YOON HA | - |
dc.identifier.scopusid | 2-s2.0-84928736641 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 48 | - |
dc.description.scptc | 27 | * |
dc.date.scptcdate | 2018-05-121 | * |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | Resistive random-access memory (ReRAM) | - |
dc.subject.keywordAuthor | memristor | - |
dc.subject.keywordAuthor | long-term potentiation (LTP) | - |
dc.subject.keywordAuthor | long-term depression (LTD) | - |
dc.subject.keywordAuthor | hardware neural network (HNN) | - |
dc.subject.keywordAuthor | bio-inspired system | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
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