DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, J | - |
dc.contributor.author | Zhu, D | - |
dc.contributor.author | Schubert, EF | - |
dc.contributor.author | Kim, JK | - |
dc.date.accessioned | 2016-04-01T08:32:38Z | - |
dc.date.available | 2016-04-01T08:32:38Z | - |
dc.date.created | 2009-09-03 | - |
dc.date.issued | 2009-07-02 | - |
dc.identifier.issn | 0013-5194 | - |
dc.identifier.other | 2009-OAK-0000018543 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/28212 | - |
dc.description.abstract | Reverse leakage current characteristics of GaInN/GaN multiple quantum well light-emitting diodes (LEDs) with various chip geometries are examined. The effect of chip geometry on the reverse leakage current is negligible at a low voltage, but becomes apparent at a high voltage. The reverse breakdown voltage of LEDs decreases as the angle of vertex in the chip geometry decreases presumably because of a highly localised electric field strength near the vertex. This suggests that a chip geometry with a rounded vertex is suitable for reliable high-power LEDs. | - |
dc.description.statementofresponsibility | X | - |
dc.language | English | - |
dc.publisher | INST ENGINEERING TECHNOLOGY-IET | - |
dc.relation.isPartOf | ELECTRONICS LETTERS | - |
dc.title | EFFECT OF CHIP GEOMETRY ON BREAKDOWN VOLTAGE OF GAINN LIGHT-EMITTING DIODES | - |
dc.type | Article | - |
dc.contributor.college | 신소재공학과 | - |
dc.identifier.doi | 10.1049/EL.2009.0470 | - |
dc.author.google | Cho, J | - |
dc.author.google | Zhu, D | - |
dc.author.google | Schubert, EF | - |
dc.author.google | Kim, JK | - |
dc.relation.volume | 45 | - |
dc.relation.issue | 14 | - |
dc.relation.startpage | 755 | - |
dc.relation.lastpage | 756 | - |
dc.contributor.id | 10100864 | - |
dc.relation.journal | ELECTRONICS LETTERS | - |
dc.relation.index | SCI급, SCOPUS 등재논문 | - |
dc.relation.sci | SCI | - |
dc.collections.name | Journal Papers | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | ELECTRONICS LETTERS, v.45, no.14, pp.755 - 756 | - |
dc.identifier.wosid | 000268004600028 | - |
dc.date.tcdate | 2018-03-23 | - |
dc.citation.endPage | 756 | - |
dc.citation.number | 14 | - |
dc.citation.startPage | 755 | - |
dc.citation.title | ELECTRONICS LETTERS | - |
dc.citation.volume | 45 | - |
dc.contributor.affiliatedAuthor | Kim, JK | - |
dc.identifier.scopusid | 2-s2.0-67650330628 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.scptc | 0 | * |
dc.date.scptcdate | 2018-05-121 | * |
dc.type.docType | Article | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
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