A single-data-bit blind oversampling data-recovery circuit with an add-drop FIFO for USB2.0 high-speed interface

Abstract

A compact blind oversampling data-recovery circuit was implemented by using a coarse data-recovery block and an add-drop first-in first out, and it was successfully applied to the universal serial bus (USB)2.0 high-speed packet data transmission. The proposed circuit recovered the serial input data by selecting the sampled data among the 5X oversampled data of a single data bit. It reduced the number of transistors by more than half and the lock time to zero, compared to the conventional blind oversampling data-recovery circuit using the de-multiplexing scheme for multibit-data. The proposed circuit was implemented with a 0.18-mu m CMOS process. It worked at the data rates ranging from 180 to 720 Mbps. The bit-error rate was measured to be less than 10(-12) with the 2(15) - 1 PRBS data transmitted though a 5-m USB cable. The chip area and the measured power consumption for 480-Mbps operation were 0.185 mm(2) and 8.2 mW, respectively.