An In-Band Noise Filtering 32-tap FIR-Embedded Delta Sigma Digital Fractional-N PLL
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- Title
- An In-Band Noise Filtering 32-tap FIR-Embedded Delta Sigma Digital Fractional-N PLL
- Authors
- Jong Mi Lee; Dong-Woo Jee; Kim, B; Park, HJ; Sim, JY
- Date Issued
- 2015-06
- Publisher
- IEEK PUBLICATION CENTER
- Abstract
- This paper presents a 1.9-GHz digital Delta Sigma fractional-N PLL with a finite impulse response (FIR) filter embedded for noise suppression. The proposed digital implementation of FIR provides a simple method of increasing the number of taps without complicated calculation for gain matching. This work demonstrates 32 tap FIR filtering for the first time and successfully filtered the in-band phase noise generated from delta-sigma modulator (DSM). Design considerations are also addressed to find the optimum number of taps when the resolution of time-to-digital converter (TDC) is given. The PLL, fabricated in 0.11-mu m CMOS, achieves a well-regulated in-band phase noise of less than -100 dBc/Hz for the entire range inside the bandwidth of 3 MHz. Compared with the conventional dual-modulus division, the proposed PLL shows an overall noise suppression of about 15dB both at in-band and out-of-band region.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/35545
- DOI
- 10.5573/JSTS.2015.15.3.342
- ISSN
- 1598-1657
- Article Type
- Article
- Citation
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 15, no. 3, page. 342 - 348, 2015-06
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