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Design of an Efficient Charge-Trapping Layer with a Built-In Tunnel Barrier for Reliable Organic-Transistor Memory SCIE SCOPUS
- Title
- Design of an Efficient Charge-Trapping Layer with a Built-In Tunnel Barrier for Reliable Organic-Transistor Memory
- Date Issued
- 2015-01-27
- Publisher
- ADVANCED MATERIALS
- ISSN
- 0935-9648
- Article Type
- Article
- Citation
- ADVANCED MATERIALS, vol. 27, no. 4, page. 706 - 711, 2015-01-27
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