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Cited 3 time in webofscience Cited 5 time in scopus
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dc.contributor.authorLee, Y-
dc.contributor.authorLi, M-
dc.contributor.authorVan der Perre, L-
dc.date.accessioned2017-07-19T13:45:28Z-
dc.date.available2017-07-19T13:45:28Z-
dc.date.created2017-02-22-
dc.date.issued2016-02-
dc.identifier.issn1549-7747-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/37531-
dc.description.abstractThis brief proposes a new compression technique of next-iteration initialization metrics for relaxing the storage demands of turbo decoders. The proposed scheme stores only the range of state metrics as well as two indexes of the maximum and minimum values, while the previous compression methods have to store all of the state metrics for initializing the following iteration. We also present a hardware-friendly recovery strategy, which can be implemented by simple multiplexing networks. Compared to the previous work, as a result, the proposed compression method reduces the required storage bits by 30% while providing the acceptable error-correcting performance in practice.-
dc.languageEnglish-
dc.publisherIEEE-
dc.relation.isPartOfIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS-
dc.titleMemory-reduced turbo decoding architecture using NII metric compression-
dc.typeArticle-
dc.identifier.doi10.1109/TCSII.2015.2483361-
dc.type.rimsART-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.63, no.2, pp.211 - 215-
dc.identifier.wosid000370533000019-
dc.date.tcdate2018-03-23-
dc.citation.endPage215-
dc.citation.number2-
dc.citation.startPage211-
dc.citation.titleIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS-
dc.citation.volume63-
dc.contributor.affiliatedAuthorLee, Y-
dc.identifier.scopusid2-s2.0-84962214035-
dc.description.journalClass1-
dc.description.journalClass1-
dc.description.scptc0*
dc.date.scptcdate2018-05-121*
dc.type.docTypeArticle-
dc.subject.keywordAuthorChannel codes-
dc.subject.keywordAuthorcommunication systems-
dc.subject.keywordAuthorerror-correction codes-
dc.subject.keywordAuthormemory compression-
dc.subject.keywordAuthorvery-large-scale integration (VLSI) designs-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-

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이영주LEE, YOUNGJOO
Dept of Electrical Enginrg
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