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dc.contributor.authorHyungjoon Chi-
dc.contributor.authorJaeseung Lee-
dc.contributor.authorHongjune park-
dc.date.accessioned2018-01-08T04:45:22Z-
dc.date.available2018-01-08T04:45:22Z-
dc.date.created2009-09-01-
dc.date.issued2006-12-
dc.identifier.issn1598-1657-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/39520-
dc.languageEnglish-
dc.publisher대한전기학회-
dc.relation.isPartOfJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE-
dc.titleA 0.12GHz-1.4GHz DLL-based clock generator with a multiplied 4-phase clock using a 0.18um CMOS process-
dc.typeArticle-
dc.type.rimsART-
dc.identifier.bibliographicCitationJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.6, no.4, pp.264 - 269-
dc.citation.endPage269-
dc.citation.number4-
dc.citation.startPage264-
dc.citation.titleJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE-
dc.citation.volume6-
dc.contributor.affiliatedAuthorHongjune park-
dc.description.journalClass1-
dc.description.journalClass1-

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박홍준PARK, HONG JUNE
Dept of Electrical Enginrg
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