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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | LEE, SOOEUN | - |
| dc.contributor.author | JAEYOUNG, SEO | - |
| dc.contributor.author | LIM, KYUNG HYUN | - |
| dc.contributor.author | JAEHYUN, KO | - |
| dc.contributor.author | SIM, JAE YOON | - |
| dc.contributor.author | PARK, HONG JUNE | - |
| dc.contributor.author | KIM, BYUNGSUB | - |
| dc.date.accessioned | 2018-05-09T01:38:51Z | - |
| dc.date.available | 2018-05-09T01:38:51Z | - |
| dc.date.created | 2018-01-29 | - |
| dc.date.issued | 2018-02-13 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/41377 | - |
| dc.publisher | IEEE | - |
| dc.relation.isPartOf | IEEE International Solid-State Circuits Conference | - |
| dc.relation.isPartOf | IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE | - |
| dc.title | A 7.8Gb/s/pin 1.96pJ/b Compact Single-Ended TRX and CDR with Phase-Difference Modulation for Highly Reflective Memory Interfaces | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | IEEE International Solid-State Circuits Conference | - |
| dc.citation.conferenceDate | 2018-02-11 | - |
| dc.citation.conferencePlace | US | - |
| dc.citation.title | IEEE International Solid-State Circuits Conference | - |
| dc.contributor.affiliatedAuthor | LEE, SOOEUN | - |
| dc.contributor.affiliatedAuthor | JAEYOUNG, SEO | - |
| dc.contributor.affiliatedAuthor | LIM, KYUNG HYUN | - |
| dc.contributor.affiliatedAuthor | JAEHYUN, KO | - |
| dc.contributor.affiliatedAuthor | SIM, JAE YOON | - |
| dc.contributor.affiliatedAuthor | PARK, HONG JUNE | - |
| dc.contributor.affiliatedAuthor | KIM, BYUNGSUB | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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- 김병섭KIM, BYUNGSUB
- Dept of Electrical Enginrg