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Conference
A 3.2Gb/s 8b Single-Ended Integrating DFE RX for 2-Drop DRAM Interface with Internal Reference Voltage and Digital Calibration

IEEE International Solid-State Circuits Conference, 2008-02-03

Conference
A-40-to-800MHz Locking Multi-Phase DLL

IEEE International Solid-State Circuits Conference, 2007-02-11

Conference
A 0.1-fref BW 1GHz Fractional-N PLL with FIR-Embedded Phase-Interpolator-Based Noise Filtering

IEEE International Solid-State Circuits Conference, page. 94 - 95, 2011-02-21

Conference
Efficient Digital Quadrature Transmitter Based on IQ Cell Sharing

IEEE International Solid-State Circuits Conference, 2015-02-22

Conference
Envelope Tracking Operation of CMOS PAs

IEEE International Solid-State Circuits Conference, 2015-02-22

Conference
A 27% Reduction in Transceiver Power for Single-Ended Point-to-Point DRAM Interface with the Termination Resistance of 4xZ0 at both TX and RX

IEEE International Solid-State Circuits Conference, page. 308 - 310, 2013-02-20

Conference
A 0.45V 423nW 3.2MHz Multiplying DLL with Leakage-Based Oscillator for Ultra-Low-Power Sensor Platforms

IEEE International Solid-State Circuits Conference, page. 188 - 190, 2013-02-19

Conference
An Analog-Digital-Hybrid Single-Chip RX Beamformer with Non-Uniform Sampling for 2D-CMUT Ultrasound Imaging to Achieve Wide Dynamic Range of Delay and Small Chip Area

IEEE International Solid-State Circuits Conference, page. 426 - 427, 2014-02-11

Conference
A Coefficient-Error-Robust FFE TX with 230% Eye-Variation Improvement Without Calibration in 65nm CMOS Technology

IEEE International Solid-State Circuits Conference, page. 50 - 51, 2014-02-10

Conference
A 5.67mW 9Gb/s DLL-Based Reference-less CDR with Pattern-Dependent Clock-Embedded Signaling for Intra-Panel Interface

IEEE International Solid-State Circuits Conference, page. 48 - 49, 2014-02-10

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