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Department of Creative IT Engineering (창의IT융합공학과)
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Article
Study on a Scaling Length Model for Tapered Tri-gate FinFET based on 3-D Simulation and Analytical Analysis
SCIE
SCOPUS
IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 60, no. 9, page. 2721 - 2727, 2013-09
Ko, MD
;
Sohn, CW
;
Baek, CK
;
Jeong, YH
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3-D Poisson&apos
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non-Cartesian mesh
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POISSONS-EQUATION
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s equation
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scaling length
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short-channel effects (SCEs)
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tapered fin
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tri-gate FinFET
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2013
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scie
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scopus
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