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Improved Endurance of RRAM by Optimizing Reset Bias Scheme in 1T1R Configuration to Suppress Reset Breakdown

Title
Improved Endurance of RRAM by Optimizing Reset Bias Scheme in 1T1R Configuration to Suppress Reset Breakdown
Authors
황현상
Date Issued
2016-06-12
Publisher
Institute of Electrical and Electronics Engineers Inc.
URI
https://oasis.postech.ac.kr/handle/2014.oak/49613
Article Type
Conference
Citation
IEEE SILICON NANOELECTRONICS WORKSHOP 2016 (SNW2016), 2016-06-12
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황현상HWANG, HYUNSANG
Dept of Materials Science & Enginrg
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