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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 김장우 | - |
| dc.date.accessioned | 2018-06-17T09:53:48Z | - |
| dc.date.available | 2018-06-17T09:53:48Z | - |
| dc.date.created | 2011-02-27 | - |
| dc.date.issued | 2007-12-04 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/56881 | - |
| dc.publisher | IEEE Computer Society | - |
| dc.relation.isPartOf | IEEE/ACM International Symposium on Microarchitecture | - |
| dc.relation.isPartOf | PROCEEDINGS OF IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE | - |
| dc.title | Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | IEEE/ACM International Symposium on Microarchitecture, pp.197 - 209 | - |
| dc.citation.conferenceDate | 2007-12-01 | - |
| dc.citation.conferencePlace | US | - |
| dc.citation.endPage | 209 | - |
| dc.citation.startPage | 197 | - |
| dc.citation.title | IEEE/ACM International Symposium on Microarchitecture | - |
| dc.contributor.affiliatedAuthor | 김장우 | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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Related Researcher
- 김장우KIM, JANGWOO
- Dept of Computer Science & Enginrg