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dc.contributor.author정윤하-
dc.date.accessioned2018-06-18T04:52:55Z-
dc.date.available2018-06-18T04:52:55Z-
dc.date.created2012-04-17-
dc.date.issued2010-11-04-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/61431-
dc.publisherIEEE-
dc.relation.isPartOf10th IEEE International Conference on Solid-State and Integrated Circuit Technology-
dc.relation.isPartOf2010 10TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY PROCEEDINGS-
dc.titleCharacteristics and modeling of Si-nanowire FETs-
dc.typeConference-
dc.type.rimsCONF-
dc.identifier.bibliographicCitation10th IEEE International Conference on Solid-State and Integrated Circuit Technology, pp.1206 - 1209-
dc.citation.conferenceDate2010-11-01-
dc.citation.conferencePlaceCC-
dc.citation.endPage1209-
dc.citation.startPage1206-
dc.citation.title10th IEEE International Conference on Solid-State and Integrated Circuit Technology-
dc.contributor.affiliatedAuthor정윤하-
dc.description.journalClass1-
dc.description.journalClass1-

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정윤하JEONG, YOON HA
Dept of Electrical Enginrg
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